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Q. Draw a block diagramfor a 2-to-4 decoder. Obtain the truth table, and develop a logic diagram.
Q. An n-channel JFET having V P = 3.5 V and I DSS = 5 mA is biased by the circuit of Figure with V DD = 28 V, RS = 3000 , and R 2 = 100 k. If the operating point is given by
20 cells with emf 1.45V and internal resistance 0.5Ω for each cells is linked 4 rows which every rows having of 5 cells in series. Load resistance 15Ω is connected to the battery.
Q. A rectangular loop is placed in the field of an infinitely long straight conductor carrying a current of I amperes, as shown in Figure. Find an expression for the total
Parity flag - Registers If after any arithmetical or logical operation if number of the accumulator are even parity flag (P) is set otherwise reset.
Construction and working of calomel electrode
3-Phase 4 Wire Meters with CT and MD If load is commonly more than 50 A, CT operated meters should be used. It is to be remembered that CTs should be properly selected for acc
write a note on vulcanization
Q. Analyze Diode circuit with RLC load? Consider a diode circuit with an RLC load, as shown in Figure, and analyze it for i(t) when the switch S is closed at t = 0. Treat the d
Demodulation of SSB signals also requires the use of a phase-coherent reference. Figure shows the general configuration to demodulate the SSBsignal.Asmall carrier component, which
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