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Q. Draw and explain the working of a negative clamping circuit.
The clamping network shown above is a negative clamping circuit that will clamp the input signal to a negative dc level.
During the interval 0‡ T/2 the network the network will appear as shown below with the diode in the 'on' state effectively shorting out the effect of the resistor R. The resulting RC time constant is so small that the capacitor will charge to V volts very quickly. During this interval the output voltage is directly across the short circuit and vo = 0V.
When the input switches to the -V state, the network will appear as shown below with the open-circuit equivalent for the diode determined by the applied signal and stored voltage across the capacitor - both 'pressuring' current through the diode from cathode to anode. Since vo is in parallel with the diode and resistor, applying Kirchoff's voltage law around the input loop will result in
-V-V-vo = 0
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Q. Find the output function Y for the logic circuits of Figure (a) and (b). An AOI (AND-OR-INVERT) gate is shown in Figure with its two possible realizations. Obtain the output
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