Already have an account? Get multiple benefits of using own account!
Login in your account..!
Remember me
Don't have an account? Create your account in less than a minutes,
Forgot password? how can I recover my password now!
Enter right registered email to receive password!
Q. Fundamental differences between RISC and CISC architecture?
Fundamental differences between RISC and CISC architecture. The following table lists following differences:
CISC
RISC
1. Large number of instructions - from
120 to 350.
1. Relatively fewer instructions - less than 100.
2. Employs a variety of data types and a large number of addressing modes.
2. Relatively fewer addressing modes.
3. Variable-length instruction formats.
3. Fixed-length instructions generally 32 bits, easy to decode instruction format.
4. Instructions manipulate operands residing in memory.
4. Mostly register-register operations. The only memory access is by explicit LOAD/STORE instructions.
5. Number of Cycles Per Instruction (CPI) varies from 1-20 depending upon the instruction.
5. Number of CPI is one as it uses pipelining. Pipeline in RISC is optimised due to simple instructions and instruction formats.
6. GPRs varies from 8-32. But no support is available for the parameter passing and function calls.
6. Large number of GPRs are available which are mainly used as Global registers and as a register based procedural call and parameter passing stack so optimised for structured programming.
7. Microprogrammed Control Unit.
7. Hardwired Control Unit.
Determine the block diagram of bcd adder To add 0110 to binary sum, we use a second 4-bit binary adder. The two decimal digits, together with input-carry, are first added in to
Illustrated about the layered architecture of Electronic Data Interchange? Layered Architecture of EDI: Electronic Data Interchange is most commonly applied into th
Binary Search Now that the basic framework is working, it is time to begin implementing a few alternative search functions. Each of these search algorithms have strengths and
Which of the logic gates are known as universal gates ? Ans. NAND and NOR are termed as universal gates, since any digital circuit can be realized completely by using either of
Q. Determine the performance of a parallel algorithm? One more method of determining the performance of a parallel algorithm can be performed after calculating a parameter know
what is software interface #Minimum 100 words accepted#
Define BCD. A binary code that distinguishes between 10 elements must contain at least 4 bits, but 6 combinations will remain unassigned. Numerous dissimilar codes can be obtai
What are the layers of data description in R/3? There layesr are there:- The external layer. The ABAP/4 layer. The database layer.
Q. Explain about Programmable Logic Array? Until now individual gates are considered as fundamental building blocks from that different logic functions can be derived. With the
Explain dynamic server creation briefly. Dynamic Server Creation: If only one server handles one request at a time, each client should wait while the server fulfils the on
Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!
whatsapp: +91-977-207-8620
Phone: +91-977-207-8620
Email: [email protected]
All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd