Explain the Asynchronous Decade Counter?

The binary counters earlier introduced have two to the power n states. But the counters with states less than this number are as well possible. They are designed to have the number of states in their sequences, which are called as a truncated sequence and these sequences are achieved by forcing the counter to recycle before going through all of its normal states.

A common modulus for the counters with truncated sequences is ten and a counter with ten states in its sequence is called as a decade counter.
By terminate the "ripple-through" counting when the count reaches decimal 9 (binary 1001). ever since the next toggle would set the two most significant bits a NAND gate tied from those two outputs to the asynchronous clear line will start the count over after 9.

Formerly the counter counts to ten (1010) all the flip-flops are being cleared. Notice that the only Q1 and Q3 are used to decode the count of ten. This is called as partial decoding as none of the other states (zero to nine) have both Q1 and Q3 HIGH at the same time.
The sequence of the decade counter is shown in the table below: