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Discuss need of Pipelining.
The simplest method for improving performance by hardware parallelism is pipelining. Pipelining has breaking up the operations to be performed in simpler independent operations, sort of as the breaking up the operations of assembling a car into an assembly line. A usual processor pipeline contains 4 pipeline stages (1) Instruction fetch, (2) Instruction decode and (3) Instruction execute and (4) Register file write-back/memory access. However in practice, real architectures consist of many more physical pipeline stages, along with multiple physical stages equivalent to one of the above stages. For illustration the execute stage might has 4 physical pipeline stages
The primary benefits of pipelining are
- Parallelism
- Smaller cycles time
a 4 bit synchronous counter uses flip flops with propagation delay times of 15ns each. what will be the maximum possible time requires for change of state?
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