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Define branch prediction logic in Pentium.
Branch prediction logic in Pentium: The Pentium microprocessor utilizes branch prediction logic to decrease the time required for a branch caused through internal delays. These delays are minimized since when a branch instruction is encountered therefore the microprocessor begins pre-fetch instruction on the branch address. These instructions are loaded in the instruction cache, therefore when the branch occurs; these instructions are present and permit the branch to execute in one clocking period. When for any reason the branch prediction logic errors, then the branch needs an extra three clocking periods to execute. Generally, the branch prediction is correct and no delay develops.
Common-base configuration: The common-base that is abbreviated as CB transistor configuration, which is as well termed as the 'grounded base' configuration, is displayed in
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