Reference no: EM132322876

Related to cache miss handling select true statement(s):

a) Write buffer in MMU helps to avoid controller stall upon cache miss during write using write through policy

b) Write back policy is easier to implement in hardware than write through policy

c) Only cache miss during write operation needs to write back dirty block into lower level memory in cache implementing write back policy

d) Write operation is faster in a cache deploying write back policy

e) Cache miss is handled only by the control unit of the processor