What are advantages and drawbacks of latches?

Advantages and drawbacks of latches:

• Area of a latch is classically less than a Flip Flop.
• It consumes less power, because of lesser switching activity and lesser area.
• It facilitates the cycle stealing or time borrowing.
• It helps increase pipeline depth along with lesser area.
• Even though the path is longer than a clock cycle for a latch based pipeline, this is okay as long as this meets the next latch setup margin.
• Into multiple clock schemes, the clock edges should not be overlapping. This makes the logic design, vector generation for verification and clock tree synthesis complicated.
• Along with barrowing and cycle stealing, there operating frequency is higher than the slower logic path.
• It forms time budgeting and characterizing the interfaces tedious.