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Q. Register-to-register operands in RISC?
Register-to-register operands: In RISC machines operation which access memories are LOAD and STORE. All other operands are kept in registers. This design feature make simpler the instruction set and consequently simplifies the CU. For illustrations a RISC instruction set can include only one or two ADD instructions (for example integer add and add with carry); on the other hand a CISC machine can have 25 add instructions including different addressing modes. Another advantage is that RISC encourages optimization of register use so that frequently used operands remain in registers.
what is Ambiguity in single inheritance
Q. Register-to-register operands in RISC? Register-to-register operands: In RISC machines operation which access memories are LOAD and STORE. All other operands are kept in reg
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