Realize various dividers in the schematic representation, Electrical Engineering

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Q. Counters are used to realize various dividers in the schematic representation of the digital clock shown in Figure. The blocks labeled "logic array" are logic gate combinations required to activate the corresponding segments in order to display the digits.

(a) Check to see that the six outputs (Y0 through Y5) display the number of hours, minutes, and seconds.

(b) If the date is also to be displayed, suggest additional circuitry.

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