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Q. Counters are used to realize various dividers in the schematic representation of the digital clock shown in Figure. The blocks labeled "logic array" are logic gate combinations required to activate the corresponding segments in order to display the digits.
(a) Check to see that the six outputs (Y0 through Y5) display the number of hours, minutes, and seconds.
(b) If the date is also to be displayed, suggest additional circuitry.
Q. Explain digital frequency meter. or Explain principle of digital frequency meter and discuss utility of time base selector with suitable diagrams. Sol. Digital Fr
Test Schedule - Meter Testing The test schedule as per the Central Electricity Authority Regulations on Installation and Operation of Meters is given below. Table: Test S
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Q. Determine L and C of the band pass filter circuit of Figure to have a center frequency of 1 MHz and a bandwidth of 10 kHz. Also find the Q of the filter.
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Discuss the ENDP assembler directive with example ENDP: It is stands for End Procedure, which informs assembler the end of a procedure. Within assembly language programm
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Loss Reduction and Efficiency Improvement of Electrical Energy 1. There are inherent losses in Transmission and Distribution of electrical energy from Generating station
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