Minimized circuit using or and and not gate, Electrical Engineering

Assignment Help:

 

Given S(F) = A'B +'C'D + C'D +'A'B + 'A B + 'A 'C + 'A D + 'A C

A. DRAW A MINIMIZED CIRCUIT USING ONLY OR AND NOT GATES (2 input gates)

B. WRITE THE WIRE LIST

Example of a wire list:           

U1 = SN74LS00

VCC --> U1-14

GND --> U1-7

A --> SW1 --> U1-1

B --> SW2 --> U1-2, U1-12, U1-13

C --> SW3 --> U1-5

U1-3 (X1) --> U1-4

U1-6 (X2) --> U1-9

U1-11 (X3) --> U1-10

U1-8 (F) --> LED

 


Related Discussions:- Minimized circuit using or and and not gate

Common drain amplifier, Common Drain Amplifier In electronics, a comm...

Common Drain Amplifier In electronics, a common-drain amplifier, as well termed as a source follower, is one type of three basic single-stage field effect transistor (FET) am

Ampere''s theorem, The    French    scientist,    Ampere,    (1775- 1836), ...

The    French    scientist,    Ampere,    (1775- 1836), conducted a series of experiments on the force between current carrying conductors. He found that: force per metre of wire (

Half-wave rectifier, Half-wave rectifier: A half-wave rectifier will j...

Half-wave rectifier: A half-wave rectifier will just only give one peak per cycle and for this reason and other reasons is only employed in extremely small power supplies. A f

Ac, power factor improvement

power factor improvement

Amper circuital lw, the plot of amper circuital law by using matlap?

the plot of amper circuital law by using matlap?

Example numerical of dc generator., Q. An 8 - pole dc generator has 500 arm...

Q. An 8 - pole dc generator has 500 armature conductors and has a useful flux per pole of 0.065 web. What will be the emf generated if it is lap connected and runs at 1000 r.p.m.

Cro, why is delay line used in vertical deflection on systems of CRO?

why is delay line used in vertical deflection on systems of CRO?

Explain basic working of integrators, Q. Explain basic working of Integrato...

Q. Explain basic working of Integrators? Figure shows a noninverting integrator, which can be seen to be a negative impedance converter added with a resistor and a capacitor. N

Matlab, how to model a doubly fed induction generator inside simulink?

how to model a doubly fed induction generator inside simulink?

#title.MIPS assembly language code., Given the INPUT: • An array of 64-bit ...

Given the INPUT: • An array of 64-bit unsigned integer elements stored in the memory starting at a known location SOURCE. • The size of the array (i.e., number of elements) stored

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd