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Question:
a) What is the main difference between a latch and a flip flop?
b) Draw the logic diagram of an SR-latch using only NAND gates.
c) A positive edge triggered J-K flip flop with preset and clear inputs is shown below. Determine Q and for the inputs shown by the timing diagram.
d) Draw a BCD asynchronous decade counter (which counts from 0000 to 1001) with asynchronous active low clear and negative edge triggered clock.
Question 1 With the help of energy band diagram differentiate between Insulators, semiconductors and metals Question 2 Explain the operation of RC phase shift oscillator
In most real signal processing applications the measured signals can not be described by an analytical expression. In addition, by the Wold decomposition theorem a stationary signa
Design a low noise amplifier using an Infineon RF transistor BFP640. The amplifier is to be used to amplify the L2 GPS signal and so the centre frequency is 1227MHz and bandwidth 4
Q. What is Time Switches? Principle of a time switch is displayed in Figure. It connects an incoming n channel PCM highway to an outgoing n channel PCM highway. As any incoming
Calculate the current flow in 30Ω resistor for the circuit in figure using Thevenin's Theorem.
Figure 1(a) shows a simple one-stage MOSFET amplifier. The input-output relationship is graphed in Figure 1(b), where the solid curve indicates operation in the saturated region an
Describe the three main sources of power dissipation in CMOS logic. Hence calculate the power dissipated in a CMOS ASIC of 40,000 gates operating at a frequency of 133MHz with a s
Q. Determine the bits required for a D/A converter to detect 1-V change when V ref = 15 V.
1. Introduction The objective of this assignment is to design and evaluate a stabilised discrete linear power supply. The power supply requires to be designed according to t
Q. Consider the balanced three-phase alternating currents, shown in Figure, to be flowing in phases a, b, and c, respectively, of the two pole stator structure shown in Figure with
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