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Q. In PRAM model steps required for executing an algorithm?
Subsequent steps are performed by a PRAM model whenever executing an algorithm: i) Read phase: First the N processors concurrently read data from N various memory locations of shared memory and later store the read data in its local registers.
ii) Compute phase: Afterwards these N processors carry out the arithmetic or logical operation on data stored in their local registers. iii) Write phase: Lastly the N processors concurrently write the computed values from their local registers in N memory locations of the shared memory.
Q. Illustrate Left shift register with parallel load? A register that shifts data in one direction only is known as Uni-directional shift register and a register that can shift
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The logic 0 level of a CMOS logic device is approximately ? Ans. The low level is 0 volts approx in CMOS logic device.
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