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Instruction Cycle
The instruction cycle consists of a series of steps required for the execution of an Instruction in a program. A distinctive instruction in a program is composed of two sections: Operand and Opcode. The Operand portion indicates the data on which the particular operation is to be done. (See below figure). The Operand portion is splitted into two portions: addressing mode and Operands. The addressing mode indicates the method of determining the addresses of the real data on which operation is to be executed and the operand portion is used like an argument by the method in determining actual address.
The Control Unit (CU), a part of Central Processing Unit (CPU) of computer fetches instructions in the program, one by one. The fetched Instruction is after that decoded by decoder which is a entity of the CU and the processor implements the decoded instructions. The outcome of execution is stored in Memory Buffer Register (MBR) (also known as Memory Data Register) for the moment. The general execution steps are shown in figure below.
Figure: Instruction execution steps
In SDK – 86 kit 128KB SRAM and 64KB EPROM is provided on system and provision for expansion of another 128KB SRAM is given. The on system SRAM address starts from 00000H and that
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