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Design a mod-12 Synchronous up counter.
Ans. Design of a mod 12 synchronous counter by using D-flipflops.
I state tablePresent state Next state Required D Inputs
A
B
C
D
DA
DB
DC
DD
0
1
How many lines of address bus must be used to access 2048 bytes of memory when available RAM chips 128 × 8. How many lines of these will be common to each chip? Ans. AS chips
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What do you mean by ‘Bresenham’s him Algorithm?
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