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Design a mod-12 Synchronous up counter.
Ans. Design of a mod 12 synchronous counter by using D-flipflops.
I state tablePresent state Next state Required D Inputs
A
B
C
D
DA
DB
DC
DD
0
1
Q. State the difference between following. i. RAM and ROM ii. SRAM and DRAM iii. Dynamic and static MOS memories
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