Design a mod-12 synchronous up counter, Computer Engineering

Assignment Help:

Design a mod-12 Synchronous up counter.

Ans. Design of a mod 12 synchronous counter by using D-flipflops.

I state table
Present state Next state Required D Inputs

A	B	C	D	A	B	C	D	DA	DB	DC	DD
0	0	0	0	0	0	0	1	0	0	0	1
0	0	0	1	0	0	1	0	0	0	1	0
0	0	1	0	0	0	1	1	0	0	1	1
0	0	1	1	0	1	0	0	0	1	0	0
0	1	0	0	0	1	0	1	0	1	0	1
0	1	0	1	0	1	1	0	0	1	1	0
0	1	1	0	0	1	1	1	0	1	1	1
0	1	1	1	1	0	0	0	1	0	0	0
1	0	0	0	1	0	0	1	1	0	0	1
1	0	0	1	1	0	1	0	1	0	1	0
1	0	1	0	1	0	1	1	1	0	1	1
1	0	1	1	0	1	0	0	0	1	0	0

Firstly draw the state table containing present state, subsequent state and required flip-flop input to provide the transition. D flip flop offers the output similar as the next state itself. After that, solve through using K maps to determine DA DB DC DD for all states.
Unutilized states are 1100,1101,1110,1111 they can be function as don't care conditions from the table. Depict Karnaugh-maps for DA, DB, DC and DD as follows and acquire Boolean expressions for them.

355_Design a mod-12 Synchronous up counter.png

569_Design a mod-12 Synchronous up counter12.png

2281_Design a mod-12 Synchronous up counter21.png

Related Discussions:- Design a mod-12 synchronous up counter

State about the mainframe computer, Mainframe computer Mainframe comput...

Mainframe computer Mainframe computers are very large, often can fill an entire room. They can store a large amount of information, can execute many tasks at the same time, can

Show the spawned program, Q. Show the spawned program? include "pvm3.h"...

Q. Show the spawned program? include "pvm3.h" main() { int ptid, msgtag; char buf[100]; ptid = pvm_parent(); strcpy(buf, "hello, world from ");

Micro processor code, Suppose that the working register W contains the valu...

Suppose that the working register W contains the value 0x4F, the register FSR contains the value 0x2B; the register with address 0x2B contains 0x2F and the instruction ADDWF INDF,

What is ale and explain the functions of ale in 8085, ALE-> Address latch e...

ALE-> Address latch enable...In the case of microcontroller (8051)& microprocessor 8085 the data line and low order 8 bit address lines are multiplexed. In order to getting address

Artificial intelligence, How AI think rationally& acting rationally

How AI think rationally& acting rationally

Illustrate simple ALU organisation, Q. Illustrate Simple ALU Organisation? ...

Q. Illustrate Simple ALU Organisation? An ALU comprises circuits which perform data processing micro-operations. Though how are these ALU circuits used in conjunction of other

Tools for performance measurement, Tools for Performance Measurement Th...

Tools for Performance Measurement The reason behind these algorithms has been to gain a speed up and improve the performance. After the parallel algorithm has been written and

Explain classless inter-domain routing, Explain Classless Inter-Domain Rout...

Explain Classless Inter-Domain Routing. It is a new addressing scheme for the internet that permits for more efficient allocation of IP addresses than old class A, B and C addr

Where shared resources are accessed, A critical section is a program segmen...

A critical section is a program segment? Ans. A critical section is a program segment where shared resources are accessed.

State the example of begin end, State the Example of begin end module s...

State the Example of begin end module sequential(); reg a; initial begin $monitor ("‰g a = ‰b", $time, a); #10 a = 0; #11 a = 1; #12 a = 0; #13 a = 1; #

Write Your Message!

Name

Email id

Message

Verfication Code

User Account

All Pages