Design a mod-12 synchronous up counter, Computer Engineering

Assignment Help:

Design a mod-12 Synchronous up counter.

Ans. Design of a mod 12 synchronous counter by using D-flipflops.

I state table
Present state Next state Required D Inputs

A	B	C	D	A	B	C	D	DA	DB	DC	DD
0	0	0	0	0	0	0	1	0	0	0	1
0	0	0	1	0	0	1	0	0	0	1	0
0	0	1	0	0	0	1	1	0	0	1	1
0	0	1	1	0	1	0	0	0	1	0	0
0	1	0	0	0	1	0	1	0	1	0	1
0	1	0	1	0	1	1	0	0	1	1	0
0	1	1	0	0	1	1	1	0	1	1	1
0	1	1	1	1	0	0	0	1	0	0	0
1	0	0	0	1	0	0	1	1	0	0	1
1	0	0	1	1	0	1	0	1	0	1	0
1	0	1	0	1	0	1	1	1	0	1	1
1	0	1	1	0	1	0	0	0	1	0	0

Firstly draw the state table containing present state, subsequent state and required flip-flop input to provide the transition. D flip flop offers the output similar as the next state itself. After that, solve through using K maps to determine DA DB DC DD for all states.
Unutilized states are 1100,1101,1110,1111 they can be function as don't care conditions from the table. Depict Karnaugh-maps for DA, DB, DC and DD as follows and acquire Boolean expressions for them.

355_Design a mod-12 Synchronous up counter.png

569_Design a mod-12 Synchronous up counter12.png

2281_Design a mod-12 Synchronous up counter21.png

Related Discussions:- Design a mod-12 synchronous up counter

Determine 8-input multiplexer IC in the TTL family, The commercially availa...

The commercially available 8-input multiplexer integrated circuit in the TTL family is ? Ans. In TTL, MUX integrated circuit is 74153.

What are the data types of vhdl, What are the Data types of VHDL VHDL....

What are the Data types of VHDL VHDL. A multitude of language or user defined data types can be used. This may mean dedicated conversion functions are needed to convert object

What are the various components in sequence diagrams, ? Actor: Actor shows ...

? Actor: Actor shows an external user / end user who interact with the system. ? Object: Object is shown by one of components of the system. ? Unit: A unit is a subsystem, o

Engneering physics, explain michesons inferometer

explain michesons inferometer

What is a digital multiplexer, What is a digital multiplexer? Ans: ...

What is a digital multiplexer? Ans: Multiplexer: Data selector or MUX is a logic circuit selects binary information from one of several input and directs this to a sing

Perform binary addition, Q. Explain the following: a. BCD code b. Gra...

Q. Explain the following: a. BCD code b. Gray code c. Excess-3 code d. True complement method Q. Addition-Subtraction-Multiplication-Division: Perform Binary Addi

Elements of information super highway infrastructure, Illustrate the elemen...

Illustrate the elements of Information Super Highway Infrastructure. The Information Superhighway is more than the Internet. This is a series of elements, including the collect

Difference between the real mode and the protected mode, Problem (a) ...

Problem (a) Explain the difference between the real mode and the protected mode in the 80x86 family of processors. (b) The 32-bit physical address 047C:0048 is to be conv

Priority array, The runqueue is the list of runnable processes on a given p...

The runqueue is the list of runnable processes on a given processor. There is only one runqueue per processor. Each runqueue contains two priority arrays: Active and Expired. Each

Explain handlers classification, Handlers Classification In 1977, Wolfg...

Handlers Classification In 1977, Wolfgang Handler suggested a complex notation for representing the pipelining and parallelism of computers. Handler's categorization addresses

Write Your Message!

Name

Email id

Message

Verfication Code

User Account

All Pages