Q. Explain functions of direct memory access?

Though CPU intervention in DMA is minimised however it should use path between interfaces that is system bus. So DMA involves an extra interface on system bus. A scheme known as cycle stealing permits DMA interface to transfer one data word at a time, after that it should return control of bus to processor. Processor merely delays its operation for one memory cycle to permit directly memory I/O transfer to 'steal' one memory cycle. When an I/O is requested processor issues a command to DMA interface by transmitting to DMA interface the subsequent information (Figure below): 

• Which operations (write or read) to be performed using write or read control lines.
• Address of I/O devices that is to be used communicated on data lines.
• Starting location on memory where information will be read or written to be communicated on data lines and is stored by DMA interface in its address register.
• Number of words which are to be read or written is communicated on data lines and is stored in data count register.

Figure: DMA block diagram