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Q. Explain Execution-modes of a multiprocessor?
Execution-modes of a multiprocessor: Several modes of multiprocessing comprise parallel execution of programs at (i) Fine Grain Level (Process Level), (ii) Medium Grain Level (Task Level), (iii) Coarse Grain Level (Program Level).
For executing programs in these modes below conditions/actions are needed at OS level.
i) Context switching between multiple processes must be fast. In order to have context switching easy multiple sets must be present.
ii) The memory allocation to several processes must be context free and fast.
iii) Synchronization mechanism among multiple processes must be effective.
iv) OS must offer software tools for performance monitoring.
Define Mapping and List mapping procedure? The transformation of data from main memory to cache memory is known as an Mapping. Associative mapping Direct mapping
Differentiate between non-relocatable and relocatable programs. A non-relocatable program is one which cannot be executed in any memory area other than the area starting at i
Handling Interrupts: Precise interrupts (sequential semantics) Complete instructions before the offending instructions o Force trap instruction into IF o
Show System call for cloning. Standard form of Clone function is as follows: Int clone (Int (*FN) (), void *child stack, Int flag, intargs,); Parameter FN is Pointer fro
Q. Fundamental types of flash memory? Code Storage Flash which is made by Intel, AMD, Atmel. It stores programming algorithms and it is largely found in cell phones. Data
Explain the Product of Sum Form - standard forms? The POS is the Boolean Expression containing OR terms, called as sum terms. The product denotes ANDing of these terms. F= (
Syntax of $display and $strobe - $display ("format_string", par_1, par_2, ... ); - $strobe ("format_string", par_1, par_2, ... ); - $monitor ("format_string", par_1, p
Explain the Logic symbols - Flip Flops? These flip-flops are as well called Master-Slave flip-flops simply because their internal construction is divided into two sections. Th
How many AND gates are required to realize Y = CD+EF+G ? Ans. Y = CD + EF + G for realize this two AND gates are needed (for CD and EF).
Q. Describe target processor arrangements? Having seen how to describe one or more target processor arrangements we need to initiate mechanisms for distributing data arrays ove
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