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Draw and discuss power failure detection circuit interrupt NMI.
The non-maskable interrupt (NMI) is an edge-triggered input which requests can interrupt upon the positive-edge. Then after a positive edge, the NMI pin should remain logic 1 till it is recognized through the microprocessor.
The NMI input is frequently used for parity errors and other main system faults, like power failures. Power failure is simply detected through monitoring the AC power line and causing an NMI interrupt when AC power drops out. Within response to that type of interrupt, the microprocessor stores all of the internal register into a battery backed-up-memory or an EEPROM. The below figure demonstrates a power failure detection circuit which provides a logic 1 to the NMI input while ever AC power is interrupted.
Memory Address The memory address is of 16 bits. It ranges from 0000?H to FFFH 16bits address lines of 8085 microprocessor are capable of addressing 216 i e 65, 536, ( or
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