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Two single-phase 60-Hz sinusoidal-source generators (with negligible internal impedances) are supplying to a common load of 10 kW at 0.8 power factor lagging. The impedance of the feeder connecting the generator G1 to the load is 1.4 + j1.6 , whereas that of the feeder connecting the generator G2 to the load is 0.8 + j1.0 . If the generator G1, operating at a terminal voltage of 462 V (rms), supplies 5 kW at 0.8 power factor lagging, determine:
(a) The voltage at the load terminals;
(b) The terminal voltage of generator G2; and
(c) The real power and the reactive power output of the generator G2.
Design a MOD-6 synchronous counter using J-K Flip-Flops.
Q. Explain the working principle of an opto coupler? When it is necessary to block the voltage between one electronic circuit and another, and transfer the signal at the same t
1) Assume that we are given the continuous-time signal xa (t) = xa1 (t) + xa2 (t) + xa3 (t), where, xa1 (t) = 2 + cos3 (2pf1 t + p 3 ) + 2 cos(2pf2 t), xa2 (t) = 2 cos(2pf3 t)
Q. What is a clamper? Differentiate between a clamper and clipper. Clamping network shifts (clamps) a signal to a different dc level, i.e. it introduces a dc level to an ac sig
Customer Relationship Management Software CRM software products are most varied and variable in cost and functionality. The significant CRM software application includes: a
1. A PCM system uses 8 bits per sample and the analog signal is limited to 4.3 kHz. The PCM data is transmitted using (a) BFSK and (b) ASK. Determine the bandwidth required for tra
Example of high resistivity material is (A) Nichrome (B) Silver (C) Gold (D) Copper Ans: Nichrome is example of high resistivity
Simulation of a pn Junction An n + p junction is fabricated on a p-type silicon substrate with N A = 8×10 15 cm -3 . The n+ region has a concentration of N D = 1.5×10 18
Q. Determine v, i, and the power delivered to elements in the network given in Figure. Check whether conservation of power is satisfied by the circuit.
HLT Halt Instruction The microprocessor halts the execution of the program and enters into the wait state the address and data bus are placed in the high impedance st
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