Design the Synchronous Sequential Circuit for State Diagram

Illustration: - We wish to design the synchronous sequential circuit whose state diagram

The kind of flip-flop to be use is J-K.

Since the state diagram we can generate the state table

Excitation table for JK flip-flop

Excitation table of the circuit

In the first row of Table we have the transition for flip-flop Q0 from 0 in the present state to 0 in the next state. In Table 10 we find that the transition of states from 0 to 0 requires that input J = 0 and input K = X. Thus 0 and X are copied in the first row under J0 and K0 respectively. Ever since the first row also shows a transition for the flip-flop Q1 from 0 in the present state to 0 in the next state 0 and X are copied in the first row under J1 and K1 and this process is continued for each row of the table and for each flip-flop.

The simplified Boolean functions for a combinational circuit can now be derived. The input variables are Q0, Q1, and x and the output is the variables J0, K0, J1 and K1 and the information from the truth table is plotted on the Karnaugh maps.