Design a bcd to seven segment decoder, Computer Engineering

Assignment Help:

Design a BCD to seven segment decoder that accepts a decimal digit in BCS and generates the appropriate output for segments in display indicator.

Ans:

BCD-TO-seven-Segment Decoder: A digital display which consists of seven LED segments is commonly utilized to display decimal numerals in digital systems. Various familiar illustrations are electronic calculators and watches where one 7-segment display device is utilized for displaying one numeral 0 through 9. To use this display device, the data has to be converted by some binary code to the code essential for the display. Frequently the binary code utilized is Natural BCD. Fig.(a) demonstrates the display device. Fig.(b) demonstrates the segments that should be illuminated for each of the numerals and Fig.(c) provides the display system.

144_BCD to seven segment decoder.png

                                  Fig.(a)                                                   Fig.(b)

1346_Design a BCD to seven segment decoder.png

Fig.(c)

Table 1 provides the truth table of BCD-to-7-segment Decoder. Now there ABCD is the Natural BCD code for numerals 0 throughout 9. The K-maps for all of the outputs a through g are specified in Fig.(d), (f),(h),(j),(l),(n),(p). The whole in the K-map corresponding to 6 binary combinations not utilized in the truth table are X -don't care.

Decimal      Digit

Displayed

 

Inputs

 

 

 

 

 

Outputs

 

 

 

 

A

B

C

D

a

b

c

d

e

f

g

0

0

0

0

0

1

1

1

1

1

1

0

1

0

0

0

1

0

1

1

0

0

0

0

2

0

0

1

0

1

1

0

1

1

0

1

3

0

0

1

1

1

1

1

1

0

0

1

4

0

1

0

0

0

1

1

0

0

1

1

5

0

1

0

1

1

0

1

1

0

1

1

6

0

1

1

0

0

0

1

1

1

1

1

7

0

1

1

1

1

1

1

0

0

0

0

8

1

0

0

0

1

1

1

1

1

1

1

9

1

0

0

1

1

1

1

0

0

1

1

Tableno.1 Truth Table of BCD-to-7 Segment Decoder

(i) K-map and Logic Diagram for Digital Output 'a':

1603_Logic Diagram for Output a.png

For the Fig.(d) the simplified expressions is given by a =  B‾ D‾  + BD + CD + A and the logic diagram is demonstrated in Fig.(e)

648_Logic Diagram for Output e.png

Fig.(e) Logic Diagram for Output 'a'

(ii) K-map and Logic Diagram for Digital Output 'b':

1015_Logic Diagram for Output f.png

For the Fig.(f) the simplified expressions is specified by b =  B‾ +  C‾D‾  + CD and the logic diagram is demonstrated in Fig.(g)

1964_Logic Diagram for Output b.png

Fig.(g) Logic Diagram for Output 'b'

(iii) K-map and Logic Diagram for Digital Output 'c':

 

761_K-map and Logic Diagram for Digital Output.png

For the Fig.(h) the simplified expressions is specified by c = B + C‾ + D and the logic diagram is demonstrated in Fig.(i)

2216_logic diagram is demonstrated in i.png

Fig.(i) Logic Diagram for Output ' c '

(iv) K-map and Logic Diagram for Digital Output'd':

747_K-map and Logic Diagram for Digital Output d.png

The simplified expressions for the Fig.(j) is given by

d = B‾D‾ + CD‾ + B‾C +BC‾D and the logic diagram is demonstrated in Fig.(k)

70_Logic Diagram for Output d.png

Fig.(k) Logic Diagram for Output ' d '

(v) K-map and Logic Diagram for Digital Output 'e':

1180_K-map and Logic Diagram for Digital Output e.png

For the Fig.(l) the simplified expressions is specified by e =  B‾D‾  + CD‾  and the logic diagram is demonstrated in Fig.(m)

1466_Logic Diagram for Output m.png

Fig.(m) Logic Diagram for Output 'e'

 (vi) K-map and Logic Diagram for Digital Output 'f':

451_K-map and Logic Diagram for Digital Output f.png

For the Fig.(n) the simplified expressions is specified by f = A + C‾ D‾  + BC‾  +BD‾  and the logic diagram is demonstrated in Fig.(o)

1170_Logic Diagram for Output n.png

Fig.(o) Logic Diagram for Output ' f'

(vii) K-map and Logic Diagram for Digital Output 'g':

 

936_K-map and Logic Diagram for Digital Output b.png

For the Fig.(p) the simplified expressions is specified by g = A + BC‾ + B‾C+ CD‾  and the logic diagram is demonstrated in fig.(q).

743_Logic Diagram for Output 1.png

Fig.(q) Logic Diagram for Output ' g '


Related Discussions:- Design a bcd to seven segment decoder

Show the programmes for parallel systems, Q. Show the Programmes for Parall...

Q. Show the Programmes for Parallel Systems? Adding elements of an array using two processor      int sum, A[ n] ;  //shared variables

Complexity of sequential search, Specified the average case complexity of s...

Specified the average case complexity of sequential search in an array of unsorted elements of size n if the following conditions hold: a)  Probability of the key to be in the a

Explain about the mini computers, Explain about the MINI COMPUTER Minic...

Explain about the MINI COMPUTER Minicomputers are much smaller in size than mainframe computers and they are also less expensive.  The cost of these computers can differ from a

One of the fault base testing techniques, One of the fault base testing tec...

One of the fault base testing techniques is:- Mutation testing is the fault base testing.

Explain the term - instruction execution, Explain the term - Instruction ex...

Explain the term - Instruction execution We  know  that  the  fundamental  function  performed  by  a  computer  is  the  execution  of  program. The program that is to be exec

Explain resource request and allocation graph (rrag), Explain Resource requ...

Explain Resource request and allocation graph (RRAG) Deadlocks can be explained by a directed bipartite graph known as a Resource-Request-Allocation graph (RRAG).A graph G = (V

Design a xnor gate and define its work, N number of XNOR gates is linked in...

N number of XNOR gates is linked in series that is the N inputs (A0, A1, A2......) are specified in the subsequently way: A0 and A1 to first XNOR gate and A2 and O/P of First XNOR

What is task identifier, Q. What is task identifier? Each and every PVM...

Q. What is task identifier? Each and every PVM task is uniquely recognized by an integer known as task identifier (TID) assigned by local pvmd. Messages are received from and s

Which of the memory is volatile memory, Which of the memory is volatile mem...

Which of the memory is volatile memory ? Ans. A volatile memory is RAM. Term Volatile memory implies the contents of the RAM get erased as soon as the power goes off.

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd