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Replacement policy:
On a particular cache miss we require to evict a line to build room for the new line
"In an A-way set associative cache, we have A option of which block to evict
"Which block will be booted out?
! random
! least-recently utilized (true LRU is too costly)
! pseudo LRU (about LRU - in case of 4-way set associatively 1 bit keeps track of which pair of blocks is LRU, and then tracking which of the block in per pair is LRU (one bit per pair))
! fixed (processing audio stream)
For a 2-way set associative cache, random replacement has a miss rate approximate
1.1 time greater than LRU replacement. As the caches turn into larger, the miss rate for both replacement strategies drop, and the difference becomes little.
Random replacement is sometimes more better than effortless LRU approximations that may be easily implemented in hardware.
Explain the Input Stage of an ADC. Ans. Input Stage- In ADC at the input stage, analog voltage can contain any value in a range although the digital output can contain
composition of two shm in right angles to each other to havingg time period in the ratio 1:2
In SDK – 86 kit 128KB SRAM and 64KB EPROM is provided on system and provision for expansion of another 128KB SRAM is given. The on system SRAM address starts from 00000H and that
A subroutine can contain nested form and endform blocks. False.
What is USB USB (UNIVERSAL SERIAL BUS) is intended to connect peripheral devices like mouse, keyboards, modems and sound cards to microprocessor through a serial data path and
Explain briefly about demultiplexers?
write algorithm and draw flowchart for exchange the values of two variables.
The desired level of coupling is:- Data coupling
CMOS circuits consume power ? Ans. As in CMOS one device is ON and one is Always OFF therefore power consumption is low or can say less than TTL.
Q. Illustrate Minimization of Gates? The generalization of Boolean expression is much useful for combinational circuit design. The subsequent three techniques are used for this
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