1) Study the CPLD Design Project Brief to gain an understanding of the project, and the System Specification, Circuit Description, Pre-processing and Post-processing Requirements for detailed design information.

2) Select EITHER the Pre-processor OR the Post-processor as the design that you will implement on the CPLD. ONLY ONE IS REQUIRED

3) Observe the following design methodology to construct your design :-

Create a new design project in the Assignment_3 module area. (We use Assignment_3 here because Quartus requires a separate design directory for each design project and Assignment_2 has already been used for the walkthroughs).

Construct the design schematic. Use standard library macrofunctions and primitive components for the dataflow and synthesise the control unit from the supplied VHDL code. You will find that many of the component types and structures in this design are similar to those used in the walkthrough example

4) Allocate suitable input/output pins and compile the design

5) Simulate the design using appropriate test vectors to verify correct operation

6) Write a brief report detailing the design project. Include details of the design and its simulation, recommended device type and its cost

(remember here that the device will also contain the other processing circuit that you haven't implemented) and a discussion of upgrade options for the complete system to higher levels of integration.