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Q. Briefly explain about Wye-delta transformation?
Certain network configurations cannot be reduced or simplified by series-parallel combinations alone. In some such cases wye-delta (Y-) transformation can be used to replace three resistors in wye configuration by three resistors in delta configuration, or vice versa, so that the networks are equivalent in so far as the terminals (A, B, C) are concerned, as shown in Figure. For equivalence, it can be shown that
For the simple case when RA = RB = RC = RY, and RAB = RBC = RCA = R, Equations (1) and 2) become
Build an intersection traffic light using the LED's as in the diagram below Day Use the LED's on the trainer (port 11) Main Street and Side Street alternate. Mai
Explain Lithography. Lithography - This is one of the processes which is carried out throughout manufacture of integrated circuits. Silica oxide (SiO 2 ) layer is thermally
Q. For a p-channel JFET in its active region, specify the polarities of voltages and the directions of conventional currents.
The one line diagram of a simple three-bus power system is shown in the figure below. Each generator is represented by an emf behind the transient reactance. All impedances are e
The Ward-Leonard system, which is used in the control of large dc motors employed in rolling mills, is a highly flexible arrangement for effecting position and speed control of a s
Q. Show Noise and Stability of operational amplifier? Noise This refers to the small, rapidly varying, random spurious signals generated by all electronic circuits. Noise
Q. Illustrate AC Power Systems? Electric power is indispensable for any modern society. Our use and demand for electric power grows annually at the rate of 2 to 3%; our need ne
A 100-kW, 230-V shunt generator has R a = 0.05 and R f = 57.5 . If the generator operates at rated voltage, calculate the induced voltage at (a) full load, and (b) one-half fu
Q. Two 1150:115-V transformers are to be inter connected for (a) 2300:230-V operation, and (b) 1150:230-V operation. Show the interconnections and appropriate polarity markings.
Interfaced 2k X 8 (i.e 2716) EPROM using multiple input NAND gate decoder for memory locations FF800H-FFFFFH. Simple NAND gate Decoder: While the 2k x 8 EPROM is used so addre
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