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Q. Briefly explain about Wye-delta transformation?
Certain network configurations cannot be reduced or simplified by series-parallel combinations alone. In some such cases wye-delta (Y- ) transformation can be used to replace three resistors in wye configuration by three resistors in delta configuration, or vice versa, so that the networks are equivalent in so far as the terminals (A, B, C) are concerned, as shown in Figure. For equivalence, it can be shown that
For the simple case when RA = RB = RC = RY, and RAB = RBC = RCA = R , Equations (1) and 2) become
Direct Tapping and Unmetered Connections Direct Tapping Direct tapping of power by non-customers is widely prevalent. This is mainly in domestic and agricultural categori
Illustrate how to replace the HT Fuse on a 6-pole and 4-pole structure? Ans: a) Open switch on 6-pole or 4-pole. b) Connect the discharge rod between earth and conduc
Q. Illustrates typical thermal noise waveform? In general, any physical resistor or lossy device can be modeled by a noise source in series with a noiseless resistor, as shown
Rise Time (t r ) During rise time voltage falls from 90% V a to 10% where V a where V a is the initial anode voltage. In terms of current time taken by anode curre
Use Thevenin's Theorem, find the current flow by resistor R=10Ω.
having looked at the circuit, i first wanted to start my frequency from 0 and plot for 10000 to 20000. so in matlab i used f = 0:10000:20000; but the equation for frequency is f= 1
You are required to design and document the hardware design for a 68HC12D60 based Lift Control Unit (LCU). This design includes the Input/Output hardware for interfacing with l
Q. When the J and K inputs of a JKFF are tied to logic 1, this device is known as a divide-by-2 counter. Complete the timing diagram shown in Figure for this counter.
1. The size of the multiplexer used to implement a truth table can be cut in half (e.g. 4 inputs instead of 8) if one of the variables is used as an input instead of being connecte
NOR Gate NOR means NOT OR . it complements the output of an OR gate. The symbol of Nor gate in fig. (a) shows that a Nor gate comprises of an OR gate followed by a N
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