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Tri State Devices
Tri State devices have three states logic 1 logic 0 and high impedance. A tri state device ( Buffer/ Inverter) has three lines output enable as shown in figure when enable line is activated the tri state device functions the same way as ordinary logic device. When enable line is disabled the logic device goes into the high impedance state. Tri state devices may be active high or active low. If it is active low a bubble is drawn in the symbol with the enable line as shown in figure and.
Level 1 is means of sending bit streams over a physical path. It uses times lot 16 of a 2 M bit/s PCM system or times slot 24 of a1.5 M bit/s system. Level 2 performs functions
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