What is the worst-case delay for acknowledging an interrupt

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Reference no: EM132915

Question

1. A microprocessor is clocked at a rate of 5 GHz.

a. How long is a clock cycle?

b. What is duration of a particular type of machine instruction consisting of eight clock cycles?

2. A microprocessor provides an instruction able of moving a string of bytes from one area of memory to another. The fetching and initial decoding of the teaching takes 10 clock cycles. Thereafter, it takes 15 clock cycles to transfer each byte. The microprocessor is clocked at a rate of 10 GHz.

a. Decide the length of the instruction cycle for the case of a string of 16 bytes.

b. What is the worst-case delay for acknowledging an interrupt if the instruction is non-interruptible?

c. What is the worse-case delay for acknowledging an interrupt if the instruction can be interrupted at the start of each byte transfer?


3. Assume that there is only a two-stage pipeline (fetch, execute). Draw the diagram to show how many time units are now required for 5 instructions.

Reference no: EM132915

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