Implement an error-detection mechanism

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The goal of this lab exercise is to implement an error-detection mechanism using thestandard CRC algorithm described in the text. Write two programs, generator andverifier. The generator program reads from standard input a line of ASCII text containingan n-bit message consisting of a string of 0s and 1s. The second line is the kbitpolynomial, also in ASCII. It outputs to standard output a line of ASCII text withn + k 0s and 1s representing the message to be transmitted. Then it outputs the polynomial,just as it read it in. The verifier program reads in the output of the generatorprogram and outputs a message indicating whether it is correct or not. Finally, write aprogram, alter, that inverts 1 bit on the first line depending on its argument (the bitnumber counting the leftmost bit as 1) but copies the rest of the two lines correctly.By typinggenerator <file | verifieryou should see that the message is correct, but by typinggenerator <file | alter arg | verifieryou should get the error message

Reference no: EM131041285

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