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Fetch-execute cycle for an add instruction

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Reference no: EM131201474

Suppose that the instruction format for a modified Little Man Computer requires two consecutive locations for each instruction. The high-order digits of the instruction are located in the first mail slot, followed by the low-order digits. The IR is large enough to hold the entire instruction and can be addressed as IR [high] and IR [low] to load it. You may assume that the op code part of the instruction uses IR [high] and that the address is found in IR [low].

Write the fetch-execute cycle for an ADD instruction on this machine.

Reference no: EM131201474

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