Devise a scheme that exploits this potential parallelism

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Reference no: EM131318664

It is possible to arrange a set-associative physical address cache so that the pagetable entry for a location can be fetched concurrently with a cache lookup for the same location. The trick is to ensure that the address bits that select the cache entry are unmapped- hat is, that selection of the cache entries to examine is based only on bits from the offset portion of the virtual address. Devise a scheme that exploits this potential parallelism. What constraint does this approach impose on the relation between the page size and the cache lookup mechanism? Explain.

Reference no: EM131318664

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