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Q1) A bus organized CPU has 32 registers with 16 bits in each, an ALU and a destination decoder.
a. How many multiplexers are there in the bus, and what is the size of each multiplexer?
b. Determine selection inputs are required if you used MUX A and MUX B system?
c. How many inputs and outputs are there in the decoder?
d. How many inputs and outputs are there in the ALU for data, including input and output carries.
e. Draw the block diagram for the system.
Determine the number of cycles will be saved if both registers are available?
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