Pci bus transactions - computer architecture, Computer Engineering

PCI bus transactions:

PCI bus traffic is prepared of a series of PCI bus transactions. Each transaction is build up of an address phase that is followed by 1 or more data phases. Direction of the data phases can be from initiator to target (write transaction) or vice-versa (read transaction), but all of the data phases ought to be in the similar direction. Either party can pause or halt the data phases at any specific point. (One common instance is a low-performance PCI device that does not support burst transactions, and always halts a transaction after the first data phase.)Any PCI device can initiate a transaction. Firstly, it might request permission from a PCI bus arbiter on the motherboard. The arbiter gives permission to 1 of the requesting devices. The initiator start the address phase by broadcasting a 32-bit address plus a 4-bit command code, then waits for an objective to respond. All other devices inspect this address and one of them responds a few cycles later.

64-bit addressing is done by using a 2-stage address phase. The initiator broadcasts the low 32 bits address, accompanied by a special "dual address cycle" command code. Components that don't support 64-bit addressing may not respond simply to that command code. In the next cycle, the initiator transmits the high 32 bits address, with adding the real command code. The transaction operates identically from that particular point. To ensure compatibility having 32-bit PCI devices, it is prohibited to use a dual address cycle if it is not necessary, for example if the high-order address bits are all 0.Though the PCI bus transfers 32 bits /data (per data) phase, the initiator transmits a 4-bit byte mask mentioning which 8- bit bytes are to be considered significant. In specific, a masked write necessity affects only on the desired bytes in the target PCI device.

 

 

Posted Date: 10/13/2012 7:28:12 AM | Location : United States







Related Discussions:- Pci bus transactions - computer architecture, Assignment Help, Ask Question on Pci bus transactions - computer architecture, Get Answer, Expert's Help, Pci bus transactions - computer architecture Discussions

Write discussion on Pci bus transactions - computer architecture
Your posts are moderated
Related Questions
Just run the PHP CLI (Command Line Interface) program and give the PHP script file name as the command line argument. For instance, "php myScript.php", assuming "PHP" is the comman

In primary storage device the storage capacity is fixed. It has a volatile memory. In secondary storage device the storage capacity is not limited. It is a nonvolatile memory. Prim

Q. What is multiplexer? Explain 4 X 1 Multiplexer.    Q. Explain the working of a Binary Half-Adder. Construct a Full-Adder from Half- Adder. Also draw the circuit diagram of full

What do you mean by u-area (user area) or u-block? This having the private data that is manipulated only by the Kernel. This is local to the Process, i.e. every process is a

Describe functions of data flow diagram After you have roughly designed data flow diagram, you could write a description of each function and you could describe the function i

Explain the application of E-Commerce in Home Banking. Home Banking: E-commerce is employed in Home Banking like one call or one click. Internet banking or online bank

What are the types of consumer oriented applications of E-commerce? Four types of Consumer Oriented applications within E-Commerce are as given below: 1. B2C (business-to-c

In a report with an LDB attribute, you do not have to explain how the information should be retrieved from the database tables, but only how the data should be shown on the screen.

Explain the various interface circuits.  An I/O interface having of circuitry required to connect an I/O device to computer bus. One side having of a data path with its associa

Name the fundamental kinds of memory used in microprocessor systems There are three fundamental kinds of memory used in microprocessor systems - generallyknown asRAM, ROM, and