Modes of 8254-microprocessor, Assembly Language

Modes of 8254 :

 

1632_modes of 8254.jpg

Mode 0 (Interrupt on Terminal Count)-GATE which value is 1 enables counting and GATE  which value is 0 disables counting, and GATE put not effect on OUT. The contents of the CR are transferred to CE on the first CLK pulse after CR is written into by the processor, unrelated of the signal on the GATE pin. Pulse that loads CE is not included in the count. OUT would low when there is an output to the control register and remains low till the count goes to 0.Primarily, Mode 0 is for event counting.

Mode 1 (Hardware Re -triggerabic  One-Shot)-After  CR has been loaded  with N, a 0-to-1  transition  on GATE will cause CE to be loaded, a one-to-zero transition  at OUT, and the count to start. When the count reaches to zero OUT will go high so producing a negative-going OUT pulse N clock periods long.

Mode 2 (Periodic Interval Timer)-after loading CR with N, a transfer is occur from CR to CE on the next clock pulse. OUT goes from one  to zero when the count becomes one and remains low for o1 CLK pulse; then it returns to 1 and CE is reloaded from CR, so  giving a negative pulse at OUT after each N clock cycles. GATE that value 1 enables the count and GAT that value is 0 disables the count. A 0-to-1 transition on GATE also causes the count to be reinitialized on the next clock pulse. This mode is utilized to provide a programmable periodic interval timer.

Mode 3 (Square-Wave Generator)-It is likewise to mode 2 except that OUT goes low when half the first count is reached and remains low till the count becomes zero. So the duty cycle is changed. As like before, GATE enables and disables the count and a zero to one transition on GATE reinitializes the count. This mode can be utilized for baud rate generation.

Mode 4 (Software-Triggered  Strobe)-It is likewise to mode 0 except that OUT is high while the counting is taking place and generate a one-clock-period negative pulse when the count reaches zero.

Mode 5 (Hardware-Triggered Strobe-Retriggerabic)-After CR is loaded, a O-to-I transition on GATE will cause a transfer from CR to CE during the next CLK pulse. OUT will be high in the time counting but will go low for one CLK period when the count becomes zero. GATE may reinitialize counting at any time.

For all modes, if the starting count is zero, it will be interpreted as216 or104 depending on the format of the count. The above descriptions were just to provide a whole idea of the operation of the 8254 in the several modes.

 

 

Posted Date: 10/10/2012 7:38:29 AM | Location : United States







Related Discussions:- Modes of 8254-microprocessor, Assignment Help, Ask Question on Modes of 8254-microprocessor, Get Answer, Expert's Help, Modes of 8254-microprocessor Discussions

Write discussion on Modes of 8254-microprocessor
Your posts are moderated
Related Questions
Cache Memory Caching is a technology based on the memory subsystem of any computer. The majoraim of a cache is to accelerate the computer while keeping the cost of the computer

Basic Microprocessor Architecture and Interface : Introduction: Intel launches its first 4-bit microprocessor 4004 in the year 1971 and 8-bit microprocessor 8008 in the y

Need help with 2 homework assignments

Explain the architecture of the file transfer protocol ftp in terms of clients, servers, sockets

AAM: ASCII Adjust for Multiplication after execution. This instruction converts the product available in the AL into unpacked BCD format.  This follows a multiplication   instruct

MyLocation SDWORD 14 TheTest        SDWORD 8     mov    eax,MyLocation     mov    ebx,TheTest     neg     eax,ebx     sub     eax,ebx Show exactly what lives in eax after executi

move a byte string ,16 bytes long from the offset 0200H to 0300H in the segment 7000H

1. Start your program at address $8500. To do this you need to inform the assembler, through the EQU and ORG assembler directives, that you want your program to start at $8500. Thi

DQ:   Define  Quad word:-  This directive is taken in use to direct the assembler to reserve 4 words (8 bytes) of memory for the specified variable and can initialise it having

do you have experts that know 4 digit 7_Seg dispaly