8237 modes-microprocessor, Assembly Language

Assignment Help:

8237 modes :

Intel 8237 can be set to four different type of style of transfer:

1) Single - One transfer at a time,  it allow processor access to the bus between transfers.

2) Block - Transfer all data, it do not allow processor access to the bus (may cause problems with memory refresh).

3) Demand - it keep transferring as long as target keeps DRQ asserted.

4) Cascade - it allow a slave controller use of the DMAC (used for DRQ4).

 

(A) In addition, the DMA controller can be set to make continuous transfers

o   It known as auto-initialized DMA

o   normally DMA is known as "single-cycle"

 

(B) 8237 is clocked at 1/2 of ISA Bus (0.5 *BLCK)

o   up to 4.166MHz (8.33 Mhz ISA)

o   Maximum transfer rate: 4.166MB/s (16-bit DMA)

o   Maximum Programmed I/O transfer rate: 2.77 MB/s

 

(C) Size of transfer

o   Master can only produce word-sized transfers

o   Slave can produce byte-sized transfers

o   Minimum transfer size: 1 byte

o   Maximum transfer size: 64KB (8-bit),128KB (16-bit)

 


Related Discussions:- 8237 modes-microprocessor

Assembly language programs-microprocessor, Assembly Language Example Progra...

Assembly Language Example Programs We studied the entire instruction set of 8086/88, pseudo-ops and assembler directives. We have explained the process of entering an assembly

Program, Write an application that does the following: (1) fill an array wi...

Write an application that does the following: (1) fill an array with 50 random integers; (2) loop through the array, displaying each value, and count the number of negative values;

Login system, a pseudo-code to add username and password combination up to ...

a pseudo-code to add username and password combination up to a limit of 10

Totorial, How can i starting with Assembly langauge?

How can i starting with Assembly langauge?

General terms for cache-microprocessor, General terms for Cache : Cac...

General terms for Cache : Cache Hits : When the cache consisted the information requested, the transaction is said to be a cache hit. Cache Miss : When the cache does n

ADDITION-SUBTRACTION, HELLO I AM TRYING TO ADD AND SUBTRACT BUT I SEEM CAN'...

HELLO I AM TRYING TO ADD AND SUBTRACT BUT I SEEM CAN''T FIND THE CORRECT REGISTER TO PUT IN

Program, wap proram for bthe addition of two 3*3 matrix

wap proram for bthe addition of two 3*3 matrix

Second generation microprocessor, IInd Generation Microprocessor : The ...

IInd Generation Microprocessor : The second generation microprocessor by using n MOS technology seemed in the market in 1973.   The Intel  8080, of nMOS  technology

Aas-arithmetic instruction-microprocessor, AAS: ASCII Adjust AL After Subt...

AAS: ASCII Adjust AL After Subtraction AAS instruction correct the result in the AL register after subtracting operation of two unpacked ASCII operands. The result is in unpacked

Lds/les instruction execution-microprocessor, LDS/LES Instruction execution...

LDS/LES Instruction execution :  LAHF : Load AH from Lower Byte of Flag: - This instruction loads the AH register with the lower byte of the flag register. This instruction ca

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd