8237 modes-microprocessor, Assembly Language

Assignment Help:

8237 modes :

Intel 8237 can be set to four different type of style of transfer:

1) Single - One transfer at a time,  it allow processor access to the bus between transfers.

2) Block - Transfer all data, it do not allow processor access to the bus (may cause problems with memory refresh).

3) Demand - it keep transferring as long as target keeps DRQ asserted.

4) Cascade - it allow a slave controller use of the DMAC (used for DRQ4).

 

(A) In addition, the DMA controller can be set to make continuous transfers

o   It known as auto-initialized DMA

o   normally DMA is known as "single-cycle"

 

(B) 8237 is clocked at 1/2 of ISA Bus (0.5 *BLCK)

o   up to 4.166MHz (8.33 Mhz ISA)

o   Maximum transfer rate: 4.166MB/s (16-bit DMA)

o   Maximum Programmed I/O transfer rate: 2.77 MB/s

 

(C) Size of transfer

o   Master can only produce word-sized transfers

o   Slave can produce byte-sized transfers

o   Minimum transfer size: 1 byte

o   Maximum transfer size: 64KB (8-bit),128KB (16-bit)

 


Related Discussions:- 8237 modes-microprocessor

Help with assemly language assignment, Will be needing help with assembly l...

Will be needing help with assembly language assignments over the course of 4 weeks

CONSTANTS, Ask question #MinimuWHAT ARE CONSTANTS AND WHAT DO THEY DO?m 100...

Ask question #MinimuWHAT ARE CONSTANTS AND WHAT DO THEY DO?m 100 words accepted#

Cache controller-microprocessor, Cache controller The cache controller ...

Cache controller The cache controller is the mind of the cache.  Its responsibilities include:  performing the  snarfs and snoops, updating the  TRAM  and SRAM and implementing

Program to convert decimal to binary number, Program is written but has err...

Program is written but has errors returning values from the procedure.

Assembly language programs-microprocessor, Assembly Language Example Progra...

Assembly Language Example Programs We studied the entire instruction set of 8086/88, pseudo-ops and assembler directives. We have explained the process of entering an assembly

Assembly language assignment, The main objective of the assignment is to ex...

The main objective of the assignment is to explore the knowledge regarding parallel ports of a computer system. You can read and write datato/from the parallel port using IN and OU

Bcsl-022, define accounting.briefly explain the accounting concepts which g...

define accounting.briefly explain the accounting concepts which guide the accountant at the recording stage.

Ror-logical instruction-microprocessor, ROR : Rotate Right without Carry: ...

ROR : Rotate Right without Carry: This instruction rotates the contents of destination operand to the bit-wise right either by one or by the count specified in register CL, exclud

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd