Find a minimum two level, multiple-output and-or gate, Electrical Engineering

Find a minimum two level, multiple-output AND-OR gate circuit to realize these functions (eight gates minimum).

F1(a,b,c,d) =Σm(10,11,12,15) +D (4,8,14)

F2(a,b,c,d) =Σm(4,11,13,14,15)+D (5,9,12)

F(a,b,c,d) =cd' +ad' +a'b'cd'+bc'

(i) Using Shannon's expression theorem, expand F about the variable d.

(ii) Use the expansion in part (a) to realize the function using two 4-variable lookup tables and 2-to-1 MUX. Specify the lookup table inputs.

(iii) Give truth table for each lookup table.

 

Posted Date: 2/16/2013 3:13:44 AM | Location : United States







Related Discussions:- Find a minimum two level, multiple-output and-or gate, Assignment Help, Ask Question on Find a minimum two level, multiple-output and-or gate, Get Answer, Expert's Help, Find a minimum two level, multiple-output and-or gate Discussions

Write discussion on Find a minimum two level, multiple-output and-or gate
Your posts are moderated
Related Questions
what are the characteristics of transformer?

Given that a BJT has β = 60, an operating point defined by I CQ = 2.5 mA, and an Early voltage V A = 50 V. Find the small-signal equivalent circuit parameters g m , r o , and rπ.

Explain Resistivity. Resistivity : Resistance R of a wire containing cross-sectional area A and length L maintain the relationship, - R α L and R α 1/A; that is resulting R α

Q. What is the procedure of Binary Division? The Binary division is the repeated process of subtraction, just as in decimal division. Signed Numbers Representation If w

what happens when we apply DC supply to transformer primary

RE should be made large enough to swamp out rB/ B. how does making RE large saturate the transistor b

HILDA ( Output) It is  called hold acknowledge signals it is active  high  i e it  goes high when  microprocessor receives HOLD signal.

how can be a karnaugh map of the count of sequence: 0-5-6-9-11-14

Consider an RLC series circuit excited by v(t) = V m cos ωt in the time domain. By using superposition, solve for the time-domain forced response of the resultant current through

Modern complex systems are normally constructed by interconnecting sub-units. Therefore the systems engineer is often not too concerned about the details of what is inside these