Find a minimum two level, multiple-output AND-OR gate circuit to realize these functions (eight gates minimum).

F₁(a,b,c,d) =Σm(10,11,12,15) +D (4,8,14)

F₂(a,b,c,d) =Σm(4,11,13,14,15)+D (5,9,12)

F(a,b,c,d) =cd' +ad' +a'b'cd'+bc'

(i) Using Shannon's expression theorem, expand F about the variable d.

(ii) Use the expansion in part (a) to realize the function using two 4-variable lookup tables and 2-to-1 MUX. Specify the lookup table inputs.

(iii) Give truth table for each lookup table.

 

Posted Date: 2/16/2013 3:13:44 AM | Location : United States

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