Example of Structural hazards - computer architecture:

A machine has shared a single-memory pipeline for instructions and data. As a consequence, when an instruction which contains a data-memory reference (load), it will conflict with the instruction reference for a afterward instruction

(instr 3):

 

 

To overcome from this problem, we stall the pipeline for 1 clock cycle when a data-memory access take place. The effect of the stall is in fact to occupy the resources for that instruction slot. The following table denoted how the stalls are in fact implemented.

 

 

Instr 1 suppose not to be data-memory reference (load or store), or else Instr 3 cannot begin execution for the similar reason as shown above.

To make simple the picture it is also commonly exposed like this:

Introducing stalls reduced performance as we discussed before.  Why, then, would the designer permit structural hazards? There are 2 reasons:

• To reduce the latency of the unit. The smaller latency comes from the lack of pipeline registers that introduce overhead.
• To reduce cost. For instance, machines that support an instruction and a cache both access every cycle (to stop the structural hazard of the above instance) need at least twice of the total memory.

 

Posted Date: 10/13/2012 4:21:25 AM | Location : United States

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