Block diagram of proportional and integral controller, Electrical Engineering

Q. Show Block diagram of proportional and integral controller?

The block diagram of Figure illustrates a typical microprocessor system used to implement the digital PI controller. It would be simple to include the derivative operation to implement the PID controller. While an analog timer is shown in Figure to determine the start of the next sampling period, a software timing loop can be used to keep track of when T seconds have elapsed. The output pulse, once every T seconds, is applied to the interrupt line of the microprocessor. This will cause the processor to execute the interrupt routine to output the next value of the control, u[(k + 1)T ], which is sent to the D/A converter, whose output in turn controls the power amplifier. The timing pulse from the timer is also sent to the "sample" command line, thereby triggering the sample-and-hold circuitry; the motor velocity ω(t) is sampled and held constant for one sampling period. The value of ω(kT) is then converted to an N-bit binary number by the A/D circuitry. The microprocessor is signaled via "data ready" line (which may be attached to the interrupt line of the microprocessor) that the sampled data have been converted. The second interrupt will cause the processor to read in the value of ω(kT) and then compute the next value of control, u[(k + 1)T]. After calculation of the control, the microprocessor waits for another interrupt from the timer before it outputs the control at t = (k + 1)T .An assembly-language program can be developed for the implementation of the PI controller.

2367_Block diagram of Proportional and integral controller.png

The control of a dc motor can be achieved with a PI controller discretized for microprocessor programming. The starting point is that the PI controller is described by a differential equation.

The latter is discretized at the sampling instants by one of the numerical approximation methods, and then is programmed in the microprocessor machine language.

Posted Date: 7/1/2013 7:52:55 AM | Location : United States







Related Discussions:- Block diagram of proportional and integral controller, Assignment Help, Ask Question on Block diagram of proportional and integral controller, Get Answer, Expert's Help, Block diagram of proportional and integral controller Discussions

Write discussion on Block diagram of proportional and integral controller
Your posts are moderated
Related Questions
Explain Memory Mapped I/O Scheme. Memory Mapped I/O Scheme: In this scheme there is only one address space. Address space is explained as all possible addresses which microproc

Configured dual processor architecture  In centralized SPC, dual processor architecture can be configured to operate in following one of three modes: 1.  Standby mode: In

design a single phase distribution circuit from a supply point to a load

Figure shows the block diagram of an aircraft pitch stabilization system which uses position, velocity and acceleration feedback. i) Show that for a unit step input the steady s

Q. The truth table for F(A,B,C) = mi (2, 3, 4 5) is as follows: (a) Express F in a canonical sum-of-products form. (b) Minimize F in an SOP form, and obtain a possible realiz

importance of electromechanical energy conversion and device in electrical engineering

Asset information management system: GIS has the potential to revolutionize the reform procedure in areas such as consumer indexing, asset and work management, distribution ne

Q. Show the schematic arrangement for: (a) one- dimensional addressing, and (b) two-dimensional addressing, if a 32-kbit ROM is used to provide an 8-bit output word.

How is 8255 (Programmable Peripheral Interface) configured if its control registercomprises 9B h.  Ans 9BH => 1001 1011 =>    b6b5=00-> Mode0    b4=0-> Port A as