Addressing modes for sequential control-microprocessor, Assembly Language

Assignment Help:

The addressing modes for the sequential control transfer instructions are described below:

 

1. Immediate: Immediate data is a part of instruction,in this type of addressing and appear in the form of successive byte or bytes. Example: MOV AX, 0005H

2. Direct: a 16-bit memory address (offset) is directly specified In the direct addressing mode, in the instruction as a part of it. Example: MOV AX, [5000H]

3. Register:  In this mode, thedata isstored in a register and it is referred using the particular register.Except IP, All the registers may be used in this mode. Example: MOV BX, AX.

4. Register Indirect: Sometimes, the address of the memory location which contains operand or data is determined in an indirect way, by using the offset registers. This mode of addressing is called as register indirect mode.The offset address of data is in either SI or BX or Dl registeredin this specific addressing mode. The default segment is either ES or DS. The data is considered to be available at the address pointed to by the content of any of the above registers in the default data segment. Example : MOV AX, [BX]

5. Indexed: In this mode, offset of the operand is stored in one of the index registers. ES and DS are the default segments for index registers SI and Dl respectively. This mode is a special case of the above discussed register indirect addressing mode. Example 5: MOV AX, [SI]

6. Register Relative:  In this mode, the data is available at an effective address formed by adding a 16-bit or 8-bit displacement with the content of any 1 of the registers BP, BX, SI and Dl in the default (either DS or ES) segment. The instance given below explains this mode. Example: MOV AX, 50H [BX]

7. Relative Based Indexed: The effective address is formed by adding a 16 bit or 8-bit displacement with the sum of contents of any one of the base registers (BX or BP) and any 1of the index registers in the default segment. Example: MOV AX, 5 OH [BX][SI]

8. Based Indexed: The effective address of data is developedin this addressing mode, by adding content of a base register (any one of BX or BP) to the content of an index register (any one of SI or Dl). The default segment register might be ES/ DS.

9. Intransigent Direct Mode: In Intransigent Direct Mode, the address in which the control is to be transferred lies in the similar  segment in which the control transfer instruction lies and appears directly in the instruction as an immediate displacement value. The displacement value is computed relative to the content of the instruction pointer IPIn this addressing mode.

10.  Intransigent Indirect Mode: In Intransigent Indirect mode, the displacement in which the control is to be transferred is in the similar segment in which the control transfer instruction lies, but it is passed to the instruction indirectly. So, the branch address is found as the content of a register or a memory location. This addressing mode can be used in unconditional branch instructions.

11. Intersegment Direct: In Intersegment Direct mode, the address to which the control is to be transferred is in a different type of segment.  This addressing mode provides  a means of branching  from 1 code segment  to another code segment. Here, the IP and CS of the destination address are indicated directly in the instruction.

12. Intersegment Indirect:  In Intersegment  Indirect mode, the address  to which  the control  is to be transferred  lies in a different  type of segment  and  it  is  passed  to  the  instruction  indirectly, for example  contents  of  a  memory  block containing  4  bytes,  for instance   IP(LSB),  IP(MSB),  CS(LSB)  and  CS(MSB)  sequentially.  The initial address of the memory block can be referred byusing any of the addressing modes, except from the immediate mode.

 


Related Discussions:- Addressing modes for sequential control-microprocessor

Pc bus and interrupt system-microprocessor, PC Bus and Interrupt System ...

PC Bus and Interrupt System The PC Bus utilized a bus controller, address latches, and data transceivers (bidirectional data buffers). 1) Bus controller : ( Intel 8288 Bus

Lds/les instruction execution-microprocessor, LDS/LES Instruction execution...

LDS/LES Instruction execution :  LAHF : Load AH from Lower Byte of Flag: - This instruction loads the AH register with the lower byte of the flag register. This instruction ca

The 486, The 486 Introduced in the year 1989 the 80486 did not feature ...

The 486 Introduced in the year 1989 the 80486 did not feature any radically new processor technology. Instead, it joints a 386 processor, a cache memory controller and a math c

The pentium pro-micro processor, The Pentium Pro    Introduced in the ...

The Pentium Pro    Introduced in the year 1995, the Pentium Pro reflected  still  more  design  breakthroughs.  The Pentium Pro may process 3 instructions in a single clock cy

Dec-micro processor, DEC : A powerful new Alpha 64 bit RISC computer ch...

DEC : A powerful new Alpha 64 bit RISC computer chip was introduced in the year 1977, as new VAX (Virtual Address Extension) Computer. The VAX was 32 bit computer line based on

Using straight line method for depreciation, Request a depreciation of the...

Request a depreciation of the item, year of purchase, cost of item, number of years to be depreciated (estimated life ) and,the method of depreciation . Method of depreciation sh

Write an assembly program to simulate a microwave, 1. The microwave has a c...

1. The microwave has a clock (hh:mm:ss am/pm) and the user should be able to change the clock at any time. 2. For cooking the user should first enter the time. The user can ente

Cbw-cwd-arithmetic instruction-microprocessor, CBW: Convert Signed Byte to...

CBW: Convert Signed Byte to Word: This instruction converts a signed byte to a signed word. In other terms, it copies the sign bit of a byte to be converted to all of the bits in

Program, 2. Write a program to separate out positive and negative numbers f...

2. Write a program to separate out positive and negative numbers from a given series of 16-bit hexadecimal numbers.

Div-idiv-arithmetic instruction-microprocessor, DIV: Unsigned Division:- T...

DIV: Unsigned Division:- This instruction performs unsigned division operation. It divides an unsigned word or double word by a 16-bit or 8-bit operand. The dividend might be in t

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd