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Zero address instruction format is used for
(A) RISC architecture.
(B) CISC architecture.
(C) Von-Neuman architecture.
(D) Stack-organized architecture.
In stack organized architecture push and pop instruction is requires a address field to specify the location of data for pushing into the stack and destination location during pop operation but for logic and arithmetic operation the instruction does not require any address field as it operates on the top two data available in the stack.
What is the disadvantage of strobe method. The drawbacks of strobe method are that the source unit that show the transfer has no way of knowing whether the destination unit h
brief explanation on pulse train
What is a Diagonalization language LD? The diagonalization language having of all strings w such that the TM whose code is w does not accept when w is given as in
Utilization Summary The Utilization Summary shows the status of each processor i.e. how much time (in the form of percentage) have been spent by every processor in busy mode, o
The number of control lines for 32 to 1 multiplexer is ? Ans. For 32 (2 5 ) the number of control lines and to select one i/p between them total 5 select lines are needed.
Multidimensional support is very necessary if we are to contain multiple hierarchies in our data analysis. Multidimensional feature permits a user to examine business and organizat
Q. Explain about strategic planning and sensitivity training? Formulation of business strategy with the due consideration of environmental analysis and organizational appraisal
Q. Example of processor arrangements? !HPF$ PROCESSORS P (10) This initiates a group of 10 abstract processors assigning them combined name P. !HPF$ PROCESSORS Q (4, 4)
Explain signed binary number system. Ans. Signed Binary Numbers: In decimal number system positive numbers are signified by (+) sign and negative numbers are represented b
Types of Structure Charts Transaction structure - control module calls subordinate modules, each of which handles a certain transaction More afferent processes Le
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