Zero address instruction format, Computer Engineering

Assignment Help:

Zero address instruction format is used for

(A) RISC architecture.

(B) CISC architecture.

(D) Stack-organized architecture.

In stack organized architecture push and pop instruction is requires a address field to specify the location of data for pushing into the stack and destination location during pop operation but for logic and arithmetic operation the instruction does not require any address field as it operates on the top two data available in the stack.

Related Discussions:- Zero address instruction format

Function in NOR gate, function nor gates W=A,B,C,D=~(AB)*~(CD)

function nor gates W=A,B,C,D=~(AB)*~(CD)

Define programmable logic array and programmable array logic, Define Progra...

Define Programmable Logic array & Programmable Array Logic? Combinational ckt is implemented with ROM Do not care conditions become an address input. PLA is alike to ROM. PLA d

Data dictionary , example of data dictionary

example of data dictionary

What is parsing in grammatical structure, What is Parsing? Parsing: ...

What is Parsing? Parsing: It is the process of analyzing a text, made of an order of tokens, to find out its grammatical structure regarding a given formal grammar. Parsing

Move the layout table, You can select and move a layout table to other area...

You can select and move a layout table to other areas in a particular document. You can't, though, move a layout table so that it overlaps another. Next you will move the table

Generalization-specialization(DBMS), Design a generalization-specialization...

Design a generalization-specialization hierarchy for a motor vehicle sales company. The company sells motorcyles,passenger cars,vans,and buses.justify your placement of attributes

How can i delete a file, The Standard C Library function is removing. (This...

The Standard C Library function is removing. (This is thus one of the few questions in this section for which the answer is not ''It's system-dependent.'') On older, pre-ANSI Unix

Define the edge-triggered flip-flops, Define the Edge-Triggered Flip-flops?...

Define the Edge-Triggered Flip-flops? An edge-triggered flip-flop changes states either at the negative edge (falling edge) or at the positive edge (rising edge) of the clock p

Project on adaptive concept map, to develop an adaptive concept map providi...

to develop an adaptive concept map providing personalized learning for Operating System subject with text file(in any form like html,ppt,txt,doc,pdf)as input

What is clock gating, What is Clock Gating? Clock gating is one of the...

What is Clock Gating? Clock gating is one of the power-saving methods used on several synchronous circuits with the Pentium four processors. To save power, clock gating consid

Write Your Message!

Name

Email id

Message

Verfication Code

User Account

All Pages