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(a) How does a data cache take advantage of spatial locality? Give an suitable example.
(b) What are the basic differences between a write-allocate and no-write-allocate policy in a cache?
(c) With the help of a fully labeled diagram, distinguish between direct and related mapping in cache memory?
(d) One example of a semiconductor memory is the DRAM
(i) Describe why a 16 Mbit DRAM chip is better being organised as compared a (2048 x 2048) x 4-bit array instead of 1M of 16 bit words.
(ii) Show a typical block diagram of the array, showing the row and column buffer blocks, refresh circuitry amongst others.
(iii) Approximately how many transistors and capacitors are required to construct a 4 MB DRAM?
(e) Describe two reasons why SRAM could be better than DRAM.
(f) Briefly explain how a multiple platter hard disk works.
What are the advantages of Public Key Cryptography? Advantages of Public Key Cryptography are illustrated in below: a) Increased convenience and security and b) Electro
How is Transaction Processing System affect performance of e-commerce sites? Transaction Processing System influences performance of e-commerce sites: Transaction-Processing
Explain in details the various standard I/O interfaces. The various standard I/O interfaces are: 1. The Peripheral component interconnect(PCI) bus is a standard that suppor
What are pages? All programs and date are composed of fixed length units known as pages. Each page consists of blocks of words that occupy contiguous locations in main memory
data associate to a class is called a ....?
explain depth buffer algorithm and its application?
Classification according to pipeline configuration: According to the configuration of a pipeline, the following parts are recognized under this classification: Unifunct
TARGET = "_blank" "_blank" opens new document in a new window. Run the code given in Figure and check how it works. This value doesn't require the use of any frames. "_blank"
a) Total available bandwidth = 1 Mbps = 1000 Kbps Each user requires send data at the rate of = 500 kbps As it is circuit switched network we have to dedicate the bandwidth So the
zmax=7.5x1-3x2 subject to constraints 3x1-x2-x3>=3 x1-x2+x3>=2 x1,x2,x3>=0
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