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(a) How does a data cache take advantage of spatial locality? Give an suitable example.
(b) What are the basic differences between a write-allocate and no-write-allocate policy in a cache?
(c) With the help of a fully labeled diagram, distinguish between direct and related mapping in cache memory?
(d) One example of a semiconductor memory is the DRAM
(i) Describe why a 16 Mbit DRAM chip is better being organised as compared a (2048 x 2048) x 4-bit array instead of 1M of 16 bit words.
(ii) Show a typical block diagram of the array, showing the row and column buffer blocks, refresh circuitry amongst others.
(iii) Approximately how many transistors and capacitors are required to construct a 4 MB DRAM?
(e) Describe two reasons why SRAM could be better than DRAM.
(f) Briefly explain how a multiple platter hard disk works.
Q Use as few gates as possible, design a NAND-to-AND gate network that realize the following Boolean algebra expression. ABCD + A'BC'D + A'BC'D' + A'BCD + (A'B'C'D' + A'BCD')
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Q. Explain about Programmable Logic Array? Until now individual gates are considered as fundamental building blocks from that different logic functions can be derived. With the
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