Q. Write a control word for counter 1 of 8253 / 8254 that selects following options:  load least significant byte only, mode 5 of operation and binary counting. Then write an instruction sequence that will load the control word into 8253 / 8254 which is located at address 01000 h of memory address space.  Suppose that 8253 / 8254 is attached to I/O bus of the CPU and address inputs A₀and A₁are supplied by A₂ and A₃.

Ans:

Based on above given conditions and presuming counter 0 is used. Control word becomes 0001 1010h.

Identify the port address

- CS is enabled when A7=1

- Control Register is selected when A1 and A0 =1

- Presuming unused address lines A6 to A2 are at logic 0, 

Then port address would be as below

   Control Register = 83H

   Counter 2 = 82H

   MVI A, B0H

   OUT 83H

   MVI A, LOWBYTE

   OUT 82H

   MVI A, HIGHBYTE

   OUT 82H

  LOOP: MVI A, 80H

   OUT 83H

   IN 82H

   MOV D, A

   IN 82H

   ORA D

   JNZ LOOP

   RET