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Q. What is verification?
Ans. Verification is the procedure of determining whether the output of one phase of software development conforms to that of its previous phase whereas validation is the process of determining whether a completely developed system conforms to its requirements specification. Therefore while verification is concerned with phase containment of errors the aim of validation is that the final product be error free.
where star topology used in daily life
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Define design process. Design process is a sequence of steps carried through which the requirements are translated into a system or software model.
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