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Q. What is verification?
Ans. Verification is the procedure of determining whether the output of one phase of software development conforms to that of its previous phase whereas validation is the process of determining whether a completely developed system conforms to its requirements specification. Therefore while verification is concerned with phase containment of errors the aim of validation is that the final product be error free.
A supermarket requires to develop software to encourage regular customers. For this the customer requires to supply his name address telephone number and driving license number. A
Q. Explain Static multivariable model? They relies on several variables representing various aspects of the software development environment for example methods used and user p
Q. Facilitated Application Specification Technique? A team oriented approach is developed for needs gathering and is called facilitated application specification Techniques FAS
Determine in detail about Waterfall model Waterfall model provides a sequential and systematic approach to software development and is better than build and fix approach. Howev
Processes and procedures make sure the correct steps are being implemented to facilitate a successful finished off a task. They also make sure a process is repeatable.
What is configuration Management? Software Configuration management (SCM) is the task of tracking and controlling alters in the software. Configuration management practices con
Q. Draw the flow chart of Risk Management-Activity and explain various Software risks. Ans RISK is a problem that could cause a few loss or threatens the success of the proje
what are the basic advantages of using interrput-initiated data transfer over transfer under progrm control without an interrput
Q. Explain the limitations of testing? Ans: Though testing is an significant part of system development and leads to a verified, valid and efficient system it as well faces s
Q. How to build the Structure Chart? Building the Structure Chart Processes in the DFD are liable to represent one module on the structure chart Efferent processes
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