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Q. What is Single Program Multiple Data?
A general style of writing data parallel programs for MIMD computers is SPMD (single program, multiple data) means all processors execute same program however every processor operates on a separate part of problem data. It's easier to program than true MIMD however more flexible than SIMD. Though most parallel computers today are MIMD architecturally they are generally programmed in SPMD style. In this style though there is not any central controller the worker nodes carry on doing basically the same thing at effectively same time. Rather than central copies of control variables stored on control processor of a SIMD computer, control variables (iteration counts and so on) are generally stored in a replicated fashion across MIMD nodes. Every node has its own local copy of these global control variables however each node updates them in an identical way. There are no centrally issued parallel instructions however communications generally occur in well-defined collective phases. These data exchanges happen in a prefixed manner which implicitly or explicitly synchronizes the peer nodes. The condition is something such as an orchestra without a conductor. There is no central control however every particular plays from the same script. The group as a complete stays in lockstep. This loosely synchronous style has a number of similarities to Bulk Synchronous Parallel (BSP) model of computing introduced by theorist Les Valiant in early 1990's. The limited pattern of the collective synchronization is easier to deal with than complex synchronisation problems of a general concurrent programming.
Q. Explain about Hexadecimal Numbers system? Hexadecimal system has 16 digits that are represented as 0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F. A number (F2) H is equivalent to
What is the Analysis Techniques Object Modelling Object modelling is very significant for any object oriented development, object modelling shows static data structure of real
What is a resource-allocation graph? Deadlocks can be described more precisely in terms of a directed graph known as a system resource allocation graph. This graph having of a
Process: pid start time end time priority timeslice list of CPU bursts list of IO bursts (the number of IO burst will always be 1 less than the number of CPU
Q. Show Error detection mechanism? Error detection mechanism can be described as below: Figure: Error detection and correction
The most expensive method of accessing Internet is to use leased lines which connect directly to the ISP. This will increase access rate to anywhere between 64 K and 1.5 Mbps, rely
Explain Erasable Programmable ROM (EPROM) - Computer Memory? An EPROM is a ROM that can be reprogrammed and erased. A little glass window is installed at the top of the ROM pac
Q. Illustrate Internal Organisation of RAM? The construction displayed in Figure below is made up of one JK flip-flop and 3 AND gates. The two inputs to system are one input bi
1+3+5+....... +11
Chaining: In this method, instead of hashing function value as location we use it as an index into an array of pointers. Every pointer access a chain that holds the element having
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