Synchronous dynamic random access memory (SDRAM) is dynamic random access memory (DRAM) that is initialized with the system bus. Classic DRAM has an asynchronous interface, which means that it responds as quickly as possible to changes in control inputs. SDRAM has a synchronous interface, meaning that it waits for a clock signal before responding to control inputs and is thus synchronized with the computer's system bus. The clock is used to drive an internal finite state machine that pipelines incoming commands. The data storage area is separated into various banks, allowing the chip to work on several memory access commands at a time, interleaved between the separate banks. This permits higher data access rates than an asynchronous DRAM.