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Q. What is Read-only-Memory?
Read only memory is an illustration of a Programmable Logic Device (PLD) it implies that binary information which is stored within a PLD is specified in some fashion and embedded within hardware. So information retains even when power goes.
Figure: ROM Design
Above figure (a) presents block diagram of ROM. It comprises 'k' input address lines and 'n' output data lines. An m ×n ROM is an array of binary cell arranged in m (2k = m) words of 'n' bits each. ROM doesn't have any data input since write operation is not defined for ROM. ROM is categorized as a combinational circuit and constructed internally with decoder and a group of OR gates. In general a m × n ROM (where m= 2k, k = no. of address lines) will have an internal k ×2k decoder and 'n' OR gate. Every OR gates has 2k inputs that are connected to each of the outputs of decoder.
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Q. Explain Open-systems interconnections architecture model The most common network architecture model is the open-systems interconnections (OSI). Figure shows the ISO (Intern
Yet another type of input is HIDDEN input. A HIDDEN input is a value/name pair which is returned to you but doesn
frequency tracking
Write a program that computes the minimum and maximum of elements in an array in Assembly 8086.
Q. Computation step in time complexity of an algorithm? So First in the computation step the local processor executes an arithmetic and logic operation. Afterwards the several
When entering word into the cell, press Alt-Enter to insert a line break. When you do so, Excel will automatically give text wrapping to the cell. To reformat existing cells s
Explain about the Public Key Cryptography. Public Key Cryptography: It is a cryptographic system which uses two keys as a public key identified to everyone and a private
Explain a public key encryption system? A public key encryption system permits only the correct receiver to decode the data.
Q. Illustrate Cache DRAM? Cache DRAM (CDRAM) which is developed by Mitsubishi integrates a tiny SRAM cache (16Kb) on a generic DRAM chip. SRAM on the CDRAM can be used in two
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