Already have an account? Get multiple benefits of using own account!
Login in your account..!
Remember me
Don't have an account? Create your account in less than a minutes,
Forgot password? how can I recover my password now!
Enter right registered email to receive password!
Q. What is Memory Interleaving?
In this scheme main memory is splitted in 'n' equal-size modules and CPU has separate Memory Base register and Memory Address Register for every memory module. Additionally CPU has 'n' instruction register and a memory access system. When a program is loaded in main memory its successive instructions are stored in successive memory modules. For illustration if n=4 and four memory modules are M1, M2, M3, and M4 then 1st instruction would be stored in M1, 2nd in M2, 3rd in M3, 4th in M4, 5th in M1, 6th in M2 and so on. Now at the time of execution of program when processor issues a memory fetch command then memory access system creates n consecutive memory addresses and places them in Memory Address Register in right order. A memory read command interprets all 'n' memory modules concurrently and retrieves 'n' consecutive instructions as well as loads them in the 'n' instruction registers. So every fetch for a new instruction results in loading of 'n' consecutive instructions in 'n' instruction registers of CPU. Because instructions are generally executed in sequence in which they were written, availability of N successive instructions in CPU avoids memory access after every instruction execution and total execution time speeds up. Apparently fetch successive instructions aren't useful when a branch instruction is encountered at the time of course of execution. This is because they need new set of 'n' successive instructions, overwriting previously stored instructions that were loaded however some of which weren't executed. The method is very efficient in minimising memory-processor speed mismatch since branch instructions don't take place often in a program.
Figure below explains memory interleaving architecture. The Figure shows a 4- way (n=4) interleaved memory system.
Figure: A 4-way Interleaved Memory
Fitness function - canonical genetic algorithm: Conversely the fitness function will use an evaluation function to calculate a value of worth for the individual accordingly th
What do you understand by E-cash? E-Cash Ecash is a cash which is showed by two models. One is the on-line form of e-cash which permits for the completion of all types of
Explain optimizing transformations? Optimizing transformations: It is a rule for rewriting a segment of a program to enhance its execution efficiency without influencing i
The for Loop The for loop works well where the number of iterations of the loop is known before the loop is entered. The head of the loop consists of three parts separated by s
Illustrate functional diagram of digital multiplexer . Write the scheme of a 4- input multiplexer using basic gates (AND/OR/NOT) and explain its operation. Ans: Multiple
Use of instruction register and program counter: Q. What is the use of instruction register (IR) and program counter (PC)? Ans: The instruction register (IR) holds the inst
Define congestion and grade of service. Congestion : This is uneconomic to give sufficient equipment to carry all the traffic which could possibly be offered to a telec
INTEL ARCHITECTURE - 64 ( IA-64) IA-64 (Intel Architecture-64) is a 64-bit processor architecture developed in cooperation by Intel and Hewlett-Packard, executed by processors s
Evolutionary approaches boil down - artificial intelligence: In fact as we will see whether evolutionary approaches boil down to like (i) just to identify how to represent pos
What is meant by super scalar processor? Super scalar processors are designed to exploit more instruction level parallelism in user programs. This means that multiple function
Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!
whatsapp: +91-977-207-8620
Phone: +91-977-207-8620
Email: [email protected]
All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd