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What is Branch prediction logic
Branch prediction logic in Pentium: Pentium microprocessor uses branch prediction logic to decrease the time needed for a branch caused by internal delays. These delays are minimized because when a branch instruction is encountered, microprocessor begins pre-fetch instruction at the branch address. Instructions are loaded into the instruction cache so when branch takes place, the instructions are present and allow the branch to execute in one clocking period. For any reason if the branch prediction logic errors, branch requires an extra three clocking periods to execute. In utmost cases, branch prediction is correct and no delay ensues.
Clocked SR flip flop A clock pulse is a sequence of logic 0, logic 1, and logic 0 occuring on the CLK input. Time t n occurs before the clock pulse and time t n+1
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