What do you meant by static and dynamic modeling, Computer Engineering

Assignment Help:

Static modeling is used to state structure of the objects that are in the problem domain. These are expressed using class, object and USECASE diagrams.

But Dynamic modeling signifying the object interactions during runtime. It is shown by sequence, activity, collaboration and statechart diagrams.       

 

 


Related Discussions:- What do you meant by static and dynamic modeling

How does tcp/ip decide the size of an ip fragment, How does TCP/IP decide t...

How does TCP/IP decide the size of an IP fragment? Explain. TCP/IP protocol utilizes the name IP datagram to refer to an Internet packet. The amount of data carried into a data

How can a parent and child process communicate, How can a parent and child ...

How can a parent and child process communicate? A parent and child can communicate by any of the normal inter-process communication schemes (pipes, sockets, message queues, sha

Explain function of network layer in tcp/ip protocol stack, Explain about t...

Explain about the function of network layer briefly in TCP/IP protocol stack. Internetwork Layer: The best-called TCP/IP protocol at internetwork layer is Internet Protoc

What is the purpose of cdata in an xml document, Question: (a) What is...

Question: (a) What is the purpose of CDATA in an XML document? Explain your answer using extract codes. (b) Consider the following definition for an address element:

Define deadlock, Define deadlock. A process requests resources; if the ...

Define deadlock. A process requests resources; if the resources are not available at that time, the method enters a wait state. Waiting processes might never again change state

Explain working of intranet, Intranets are mainly "small" Internets. They u...

Intranets are mainly "small" Internets. They use same network facilities that Internet does, though access is restricted to a limited sphere. For example, a company can set up an i

Design a 4:1 mux in verilog, Design a 4:1 mux in Verilog   Mult...

Design a 4:1 mux in Verilog   Multiple styles of coding. e.g. Using if-else statements if(sel_1 == 0 && sel_0 == 0) output = I0; else if(sel_1 == 0 && sel_0 ==

Why we use debugger, Q. Why we use Debugger? Debugger is a program whic...

Q. Why we use Debugger? Debugger is a program which allows the user to test as well as debug the object file.  Theuser can use this program to perform subsequent functions.

Define memory access time, Define memory access time? The time needed t...

Define memory access time? The time needed to access one word is known as the memory access time. Or It is the time that elapses among the initiation of an operation and the co

Fuzzy logic - artificial intelligence, Fuzzy Logic - artificial intelligenc...

Fuzzy Logic - artificial intelligence: In the above logic, we have been concerned with truth whether propositions and sentences are true. But, with some natural language statem

Write Your Message!

Captcha
Free Assignment Quote

Assured A++ Grade

Get guaranteed satisfaction & time on delivery in every assignment order you paid with us! We ensure premium quality solution document along with free turntin report!

All rights reserved! Copyrights ©2019-2020 ExpertsMind IT Educational Pvt Ltd