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Q. J and K are the external inputs to the JKFF shown in Figure. Note that gates 1 and 2 are enabled only when the clock pulse is high. Consider the four cases of operation and expl
Use the offset diode model with a threshold voltage of 0.6 V to determine the value of v 1 for which the diode D will first conduct in the circuit of Figure(a).
RLC Rotate Accumulator Left Instruction This instruction also rotates the contents of the accumulator towards left by one bit. The D 0 bit moves to D 1 bit moves to D
Draw the block diagram of TDM-PCM system. Explain each block. Calculate the bit rate at the output of this system
(a) Give three different ways how electro-magnetic interference can be reduced in twisted pairs based transmission. (b) Noise are unwanted signals affecting transmission. Lis
What are the precautions to be taken before basic work on electrical installations? Ans: Before starting any electrical works on installations disconnect the power supply to
The frequency domain representation of a signal is shown below: i. What are the fundamental frequency and the corresponding period of this signal (shown in Figure )? ii. Pl
Q. JFET Common Source Amplifier? The common source configuration for a FET is similar to the common emitter bipolar transistor configuration, and is shown in figure. The common
Aloudspeaker is a common electrochemical transducer in which vibration is caused by changes in the input current to a coil which, in turn, is coupled to a magnetic structure that c
A 25KVA, 3 phase, wye-connected, 400v synchronous generator has a synchronous impedance of 0.05 +j1.6 ohms per phase. Determine the full load voltage regulation at (a) 0.8 power
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