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Q. Structure of Input - Output Interface?
Due to complexity and number of external devices that I/O interface control, there is not any standard structure of I/O interface. Let's give a general structure to an I/O interfaces:
Figure: The General Structure of an I/O
Figure above is a typical figure of an I/O interface that additionally to all registers as defined above has status/control registers that are used to pass on status information or control information.
Why a function should have at least one input? There is no strong reason for this in verilog. I think this restriction isn't removed fin SystemVerilog. Some requirements where
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