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Register-to-Register Architecture
In this organization results and operands are not accessed straight from main memory by scalar or vector registers. The vectors that are needed currently can be stored in CPU registers. Cray-1 computer accepts this architecture for vector instructions and its CPY comprise 8 vector registers. Every register is able to storing a 64 element vector where one element is of 8 bytes.
Give the solutions for critical section problem? A solution to the critical section problem must specify the subsequent requirements. (a) Mutual exclusion (b) Progress (c)
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What is WMFC? WMFC if the control signals that causes the processor's control circuitry to wait for the arrival of the MFC signal.
Explain how a shift register can be used as a ring counter giving the wave forms at the output of the flipflops. Ans: Shift Register as a Ring Counter: A Ring Counter is a
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Which of following can not be accessed randomly DRAM, SRAM, ROM or Magnetic tape ? Ans. Magnetic tape cannot be accessed randomly; it can only be accessed sequentially.
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Which of the following is the fastest logic ECL, TTL, CMOS or LSI ? Ans. The fastest logic is ECL.
What are the different message types available in the ABAP/4 ? There are 5 types of message types available. E: ERROR W-WARNING I -INFORMATION A-ABNORMAL TERMINA
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